src/stm/atomic.h

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/*
 * (c) Copyright 2008, IBM Corporation.
 *
 *      Licensed under the Apache License, Version 2.0 (the "License");
 *  you may not use this file except in compliance with the License.
 *  You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/*********************************************************************
 * Author: Maged Michael <magedm@us.ibm.com>
 *********************************************************************/
#ifndef ATOMIC_H
#define ATOMIC_H
/*--------------------------------------------------------------------*/
#if defined(X86) || defined(X64) || defined(SPARC32)
#define ret_t           char
#define ret32_t         char
#define ret64_t         char
#else
#define ret_t           long
#define ret32_t         int
#define ret64_t         long long
#endif
#define rc_ret_t        ret32_t
/*--------------------------------------------------------------------*/
#if defined(X86)

static inline int cas32(int volatile * addr,
                        int expval,
                        int newval) {
  char ret;
  __asm__ __volatile__(
    "lock; cmpxchg %2, %1; setz %0;\n"
    : "=a"(ret), "=m"(*(addr))
    : "r" (newval), "a"(expval)
    : "cc");
  return ret;
}

#define ISYNC
#define LWSYNC
#define HWSYNC
//              asm volatile ("mfence")
#define RBR
#define RBW
#define WBW
#define WBR     asm volatile ("mfence")

#define GET_PC(pc) \
        pc = 0xc0dec0de // fake pc - obsolete

#ifdef X86

static inline int cas64(long long volatile * addr,
                         long long expval,
                         long long newval) {
  long long oldval;
  __asm__ __volatile__(
     "lock; cmpxchg8b %3"
     : "=A"(oldval)
     : "b"((int)newval),
     "c"((int)(newval >> 32)),
     "m"(*(volatile long long *)(addr)),
     "0"(expval)
     : "memory");
  return (oldval == expval);
}

#else /* X64 */

static inline int cas64(long long volatile * addr,
                         long long expval,
                         long long newval) {
  char ret;
  __asm__ __volatile__(
    "lock; cmpxchg %2, %1; setz %0;\n"
    : "=a"(ret), "=m"(*(addr))
    : "r" (newval), "a"(expval)
    : "cc");
  return ret;
}

#endif /* X86 v X64 */

#elif defined(SPARC32)

static inline int cas32(unsigned volatile * addr,
                 unsigned expval,
                 unsigned newval) {
  asm volatile (
         "casa  %0 0x80, %2, %1\n"
       : "+m"(*(addr)), "+r"(newval)
       : "r" (expval)
       );
  return (newval == expval);
}

#define ISYNC
#define LWSYNC
#define RBR     asm volatile ("membar #LoadLoad")
#define RBW     asm volatile ("membar #LoadStore")
#define WBW     asm volatile ("membar #StoreStore")

#else
#error architecture not defined
#endif /* architecture */
/*--------------------------------------------------------------------*/
#define CAS32(addr,expval,newval) \
        cas32((int *)(addr),(int)(expval),(int)(newval))
#define CAS64(addr,expval,newval) \
        cas64((long long *)(addr),(long long)(expval),(long long)(newval))
/*--------------------------------------------------------------------*/
#if defined(BIT64)
#define CAS(addr,expval,newval) CAS64(addr,expval,newval)
#else // 32-bit
#define CAS(addr,expval,newval) CAS32(addr,expval,newval)
#endif // 64-bit v 32-bit
/*--------------------------------------------------------------------*/
#define FAA(oldval,addr,val) \
 do { \
    long newval; \
    oldval = *(addr); \
    newval = oldval + val; \
    int ret = CAS(addr,oldval,newval); \
    if (ret) break; \
 } while (1);
/*--------------------------------------------------------------------*/
static void tts_acq(volatile long * lock) {
  while (1) {
    while (*lock);
    int ret = CAS(lock,0,1);
    if (ret)
      break;
  }
  ISYNC;
}
/*--------------------------------------------------------------------*/
static void tts_rel(volatile long * lock) {
  LWSYNC;
  *lock = 0;
}
/* ------------------------------------------------------------------ */
#endif /* ATOMIC_H */

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